13th VI-HPS Tuning Workshop (BSC, Barcelona, Spain)

Date

Monday 10th - Friday 14th February 2014.

Location

The workshop will take place at Barcelona Supercomputing Center (BSC), Vertex building VS 217/219, UPC Campus Nord, Barcelona, Spain.

Organizing Institutions

Goals

This workshop organized by VI-HPS for the Spanish PRACE Advanced Training Centre hosted by Barcelona Supercomputing Center will:

give an overview of the VI-HPS programming tools suite
explain the functionality of individual tools, and how to use them effectively
offer hands-on experience and expert assistance using the tools

Programme Overview

Presentations and hands-on sessions are planned on the following topics:

Setting up, welcome and introduction
Parallel file I/O bottlenecks and solutions
Paraver trace analysis tool
Dimemas performance prediction tool
Score-P instrumentation and measurement infrastructure
Scalasca automated trace analysis toolset
Vampir interactive trace analysis toolset
Periscope automated performance analysis tool
MAQAO binary analysis & optimization tool
MUST runtime error detection tool for MPI

A brief overview of the capabilities of these and associated tools is provided in the VI-HPS Tools Guide.

The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. There is no fee for participation, however, participants are responsible for their own travel and accommodation.

Classroom capacity is limited, therefore priority will be given to applicants with parallel codes already running on the workshop computer system (MareNostrum-III), and those bringing codes from similar systems to work on. Participants are therefore encouraged to prepare their own MPI, OpenMP and hybrid OpenMP+MPI parallel application codes for analysis.

Programme in Detail

Day 1:	*Monday 10 February*
13:30	(registration)
14:00	Welcome Introduction to VI-HPS & overview of tools [Marc Schlütter] Introduction to parallel performance engineering [Marc Schlütter] Introduction to simple performance modeling [Tim Cramer] Parallel file I/O bottlenecks and solutions [Wolfgang Frings]
15:30	(break)
16:00	Lab setup MareNostrum-III hardware and software environment [Harald Servat] Building and running NPB-MZ-MPI/BT-MZ on MareNostrum-III
17:30	(adjourn)

Day 2:	*Tuesday 11 February*
09:00	Paraver trace analysis Paraver hands-on exercises (Judit Gimenez & Harald Servat)
10:45	(break)
11:15	Dimemas performance prediction Dimemas hands-on exercises (Judit Gimenez & Harald Servat)
13:00	(lunch)
14:00	Hands-on coaching to apply tools to analyze participants' own code(s).
17:00	Review of day and schedule for remainder of workshop
17:30	(adjourn)

Day 3:	*Wednesday 12 February*
09:00	Score-P instrumentation & measurement [Robert Dietrich] Score-P hands-on exercises CUBE hands-on exercises [Marc Schlütter]
10:45	(break)
11:15	Score-P analysis scoring & measurement filtering Measuring hardware counters and other metrics Scalasca automated trace analysis [Marc Schlütter] Scalasca hands-on exercises
13:00	(lunch)
14:00	Hands-on coaching to apply tools to analyze participants' own code(s).
17:00	Review of day and schedule for remainder of workshop
17:30	(adjourn)

Day 4:	*Thursday 13 February*
09:00	Vampir interactive trace analysis [Tobias Hilbrich & Robert Dietrich] Vampir hands-on exercises Score-P advanced configuration
10:45	(break)
11:15	Periscope tuning framework (CFS,MPI) [Michael Firbach & Eduardo César] Periscope hands-on exercises (CFS User's Guide)
13:00	(lunch)
14:00	Hands-on coaching to apply tools to analyze participants' own code(s).
17:00	Review of day and schedule for remainder of workshop
17:30	(adjourn)

Day 5:	*Friday 14 February*
09:00	MUST correctness checking [Joachim Protze & Felix Münchhalfen] MUST hands-on exercises
10:45	(break)
11:15	MAQAO performance analysis and optimization [Andres Charif-Rubial & Jean-Baptiste Besnard] MAQAO hands-on exercises
13:00	(lunch)
14:00	Hands-on coaching to apply tools to analyze participants' own code(s). Review
15:00	(break)
15:30	(adjourn or continue with work to 16:30)

Hardware and Software Platforms

MareNostrum-III: 36 IBM iDataPlex racks with a total of 3,056 compute nodes with dual Intel Xeon E5-2670 (SandyBridge-EP) 2.6 GHz 8-core processors with 2-way SMT and 32 GB memory per node, Mellanox Infiniband interconnection network, SuSE Linux, IBM POE MPI, Intel compilers, LSF batch software, GPFS parallel filesystem.

The local HPC system MareNostrum-III is the primary platform for the workshop. Course accounts will be provided during the workshop to participants. Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited and participants are expected to already possess user accounts on non-local systems. Regardless of whichever systems they intend to use, participants should be familiar with the relevant procedures for compiling and running their parallel applications (via batch queues where appropriate).

Participants are expected to bring and use their own notebook computers with SSH and X11 software configured to connect to the HPC systems and run interactive graphical tools.

Registration

Registration is via the PRACE training portal: the number of participants is limited and selection made based on the information provided when registering.

Contact

Judit Gimenez
Barcelona Supercomputing Center
Phone: +34 93 401-7178
Email: judit.gimenez@bsc.es

Brian Wylie
Jülich Supercomputing Centre
Forschungszentrum Jülich
Phone: +49 2461 61-6589
Email: b.wylie@fz-juelich.de